Considering the variety of studies that have been reported in low-power designing era, the subthreshold design trend in Very\r\nLarge Scale Integrated (VLSI) circuits has experienced a significant development in recent years. Growing need for the lowest\r\npower consumption has been the primary motivation for increase in research in this area although other goals, such as lowest\r\nenergy delay production, have also been achieved through sub-threshold design. There are, however, few extensive studies that\r\nprovide a comprehensive design insight to catch up with the rapid pace and large-scale implementations of sub-threshold digital\r\ndesign methodology. This paper presents a complete review of recent studies in this field and explores all aspects of sub-threshold\r\ndesign methodology. Moreover, near-threshold design and low-power pipelining are also considered to provide a general review\r\nof sub-threshold applications. At the end, a discussion about future directions in ultralow-power design is also included.
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